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decoder3_8
- 3-8decoder实现fpga功能,3-8decoder实现fpga功能-3-8decoder
3-to-8Decoder
- 3 to 8 Decoder in vhdl
S1_38yima
- 3-8译码器的VHDL语言实现的源程序代码-3-8Decoder
3-8Decoder
- 二进制译码器只显示0,1。十进制译码器显示0-9、显示译码器显示0—F-Show only 0,1 binary decoder. Showing 0-9 decimal decoder, display decoder display 0-F
uiui
- 8实验八:利用语言实现3-8译码器-In 8 experiments in eight : the use of language 3-8decoder
3-8decoder
- 3_8译码器,vhdl语言编写,使用在fpga板子上,原始代码.-3_8 decoder, vhdl language written in use in the fpga board, the original code.
3-8decoder
- FPGA/CPLD的开发,基于VHDL语言编写的3-8译码器,供大家参考-Based on the VHDL language 3-8 decoder
3-8decoder
- 38译码器功能及界面的labview实现-38 decoder design and implementation
lab6-3-8DECODER
- 数字设计和计算机体系结构:用verilog语言描述3-8译码器的设计与实现-Digital design and computer architecture: use verilog language describe 3-8 decoder design and implementation
3 8
- 用VHDL多种方法实现3-8译码器,元件例化(use VHDL realize 3-8decoder)
3-8decoder
- 3-8线译码器,输入为3位的二进制数字,进行译码,得到有效数字(3-8 wire decoder, input to 3 bits of binary digit, carry on decoding and get effective number.)