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Hi3559V100DMEB_VER_A_PCB
- 海思3559PCB图 allegro软件(HI3559 pcb ,THE APP IS ALLEGRO)
test_ddr3
- 基于XILINX K7系列FPGA实现5120*5120分辨率20帧的DDR3读写,发送到海思3559,HDMI显示。(Based on Xilinx K7 series FPGA to achieve 5120*5120 resolution of 20 fr a mes of DDR3 read and write, sent to the Hays 3559,HDMI display.)