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sixuanyi
- 四选一选择器,输入四个,输出1个.当NM=00时选A 当NM=01时选B 当NM=10时选C 当NM=11时选D-four elected a selector, the importation of four, Output 1. When NM = 00 A at the election when NM = 01 am when the election NM B = C 10:00 when the election NM =
one_in_four
- 用CASE语句来设计的四选一电路,大家可以放心使用的,很简单,也很实用,希望能有所帮助.
VHDL作业－张晓峰036099149
- VHDL的四选一选择器-VHDL four elected a selector
VHDL作业－张晓峰036099149
- VHDL的四选一选择器-VHDL four elected a selector
sixuanyi
- 四选一选择器,输入四个,输出1个.当NM=00时选A 当NM=01时选B 当NM=10时选C 当NM=11时选D-four elected a selector, the importation of four, Output 1. When NM = 00 A at the election when NM = 01 am when the election NM B = C 10:00 when the election NM =
one_in_four
- 用CASE语句来设计的四选一电路,大家可以放心使用的,很简单,也很实用,希望能有所帮助.-Using CASE statement to design one circuit of the four elections, we can be assured that use, is simple and practical, hoping to be helpful.
4_1
- 四选一编程语言，可以自动生成四选一器件。-First elected four programming languages, you can automatically generate a four selected devices.
bible
- 基于EDA的三八译码器，四选一优先选择器，楼梯开关电路，包含程序运行波形图。-EDA-based decoder of the 38, four elections to choose a priority, and the staircase switch circuit, including wave run.
mux4_to_1
- 简单实用的四选一多路选择器，其中包括门级和数据流级程序代码，以及验证功能的激励程序代码。-Four simple and practical way to choose more than one election, which includes gate-level and code-level data stream, as well as the incentive to verify the functional code.
mux4_1
- 数字系统设计的编程，实现四选一的多路选择器，用ｖｅｒｉｌｏｇ实现。-The design of digital systems programming, to achieve the election of the four MUX, with the realization of verilog.
Desktop
- 四选一多路选择器 modelsim testbench-Select more than one four-way selector modelsim testbench
mux
- 用case描述的 四选一 数据选择器短小精湛初学者必看-With the case described in four short selection of a data selector superb must-see for beginners
7_decoder
- VHDL编写！数据选择器大全！ 包括： mux2to1.vhd 二选一电路 mux2_1.vhd 二选一电路 mux2_1.bdf 二选一电路 mux3to1.vhd 三选一电路 mux3to1_1.vhd 三选一电路 mux4to1.vhd 四选一电路 -VHDL write! Data selector Daquan! Including: mux2to1.vhd two choose a circu
LabVIEW
- 四选一数据选择器.vi 3-8译码器.vi 全减器.vi 时钟.vi RS触发器.vi-4 Select a data selector. Vi 3-8 decoder. Vi Full reduction device. Vi Clock. Vi RS flip-flop. Vi
4
- 双四选一数据选择器74LS153,1、写一个程序，用顺序描述语句和并发描述语句（选择信号代入语句或者条件信号代入语句）分别控制74LS153的一个输出端Q。 2、比较一下顺序语句与并行语句各自的优缺点。 输入：逻辑开关。输出：LED灯。 -A double four election data selector 74LS153, 1, write a program, with sequential and concurre
simulation
- 对数字电路，通信原理，DSP等一些现象的仿真：比如整流器，滤波器，仿真二/四译码器，四选一数字选择器，信号发生器，2FSK信号的调制、滤波、频谱分析等，对DSP中各种滤波的仿真以及通原中的调制解调的仿真等-Digital circuits, communication theory, DSP and some other phenomena simulation: for example, rectifiers, filters, si
xiao
- 四选一选择器的verilog实现！希望有用-Four selected to achieve a selector verilog! Hope that useful
four_selsect
- 在QuartusII软件环境下，编写的四选一功能的实现，包含仿真波形-Quartusii software in the circumstances, to write a function of the implementation of a simulation waveforms
mux41
- 四选一数据选择器（四个输入选择一个输出）(Four select a data selector)
mux四选一
- mux四选一及译码器：MUX电路在数字集成电路被广泛使用，作为寄存器或者其他电路的输入选择控制。也是ASIC设计中的基本门电路之一。(MUX four selection one and decoder)