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双口RAM硬件和软件可靠性握手的实现
- 双口RAM硬件和软件可靠性握手的实现 双口RAM硬件和软件可靠性握手的实现-dual-port RAM reliability of the hardware and software to shake hands with the dual port RAM hardware and software to achieve the reliability handshake
双口RAM硬件和软件可靠性握手的实现
- 双口RAM硬件和软件可靠性握手的实现 双口RAM硬件和软件可靠性握手的实现-dual-port RAM reliability of the hardware and software to shake hands with the dual port RAM hardware and software to achieve the reliability handshake
firm_usb
- DSP通过双口RAM和ISP1581实现下位机的USB固件程序，调试通过，上位机驱动和读写例程，如果下载多的话再传-DSP through dual-port RAM and ISP 1581 to achieve lower computer's USB firmware and Debugging, PC drivers and routines to read and write, if you download are
allidt_20020616.tar
- idt的双口ram的读写接口程序，verilog 代码，并且有测试文档-Employing a dual-port ram reader interface program, Verilog code, and a test document
dpram_fpga
- 这是我用vhdl语言，在fpga内部做了一个双口ram的程序。我的邮箱：wleechina@163.com-This is the language I used vhdl in fpga done an internal dual-port ram procedures. My mail : wleechina@163.com
my_ramlib_06
- 包括各种类型存储器的VHDL描述，如FIFO，双口RAM等 -including various types of memory VHDL descr iption, such as FIFO, Dual Port RAM, etc.
vhdl_ad0809_arm
- 本程序是用VHDL语言写的，包括AD0809，双口RAM等程序。已经调试过-this program is written in VHDL, including the AD0809, dual-port RAM, and other procedures. Debugging has been too
IDT7132
- AT89C52扩展外部双口RAM(IDT7132)，在Keil C51环境下测试，和一般的RAM使用方法相当！用串口调试助手观看测试结果-AT89C52 expand external dual-port RAM (IDT7132) Keil C51 in the test environment, and the general use of RAM is! Help with serial debugging watched tes
my_fifo_vhdl
- XILINX的FPGA实现的双口ram源码，可作为dsp\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
ICL7135
- 双口RAM程序实例-Dual-port RAM instance
DDram
- 07全国大学生电子设计竞赛C题获奖作品FPGA外围接口双口RAM部分源码-07 National Undergraduate Electronic Design Contest winning entries C title peripheral interface FPGA dual-port RAM part of source
dul_ram(yk)
- 关于双口RAM的Verilog HDL源码-On the dual-port RAM in Verilog HDL source
dev
- linux下 双口ram驱动程序 2.4.18-linux under the dual-port ram driver 2.4.18
fifov1
- FIFO（先进先出队列）通常用于数据的缓存和用于容纳异步信号的频率或相位的差异。本FIFO的实现是利用 双口RAM 和读写地址产生模块来实现的.FIFO的接口信号包括异步的写时钟（wr_clk）和读时钟（rd_clk）、 与写时钟同步的写有效（wren）和写数据（wr_data） 、与读时钟同步的读有效（rden）和读数据（rd_data） 为了实现正确的读写和避免FIFO的上溢或下溢，给出与读时钟和写时钟分别同步的FIFO
RAM
- 双口RAM的应用-Application of dual-port RAM
FPGA-TWO-RAM
- 这样就可以在FPGA内实现双口RAM了-This can be achieved in the FPGA dual-port RAM
dual-ram
- 实现双口RAM映射到DSP地址单元空间中，使得双口RAM直接读取DSP中的数据或程序。-Achieve dual-port RAM modules mapped to the DSP address space, making dual-port RAM directly read the data in the DSP or procedures.
ram
- 基于altera ep2c8双口RAM -Altera ep2c8-based dual-port RAM
RAM
- 双口RAM Verilog描述 双口RAM Verilog描述-Dual-port RAM Verilog descr iption of dual-port RAM Verilog descr iption of dual-port RAM Verilog descr iption of
双口RAM原理及应用实例PPT
- 双口ram介绍说明，仔细查看有作用！原理介绍(Double port RAM instructions, carefully check the role!)