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FIFO_BEFORE
- 是基于fpga的FIFO乒乓操作，后面是与SDRAM接口的，这样主要方便sdram的刷新-fpga is based on the FIFO Table Tennis operation, and is behind SDRAM interface, This major update to the convenience sdram
FIFO_BEFORE
- 是基于fpga的FIFO乒乓操作，后面是与SDRAM接口的，这样主要方便sdram的刷新-fpga is based on the FIFO Table Tennis operation, and is behind SDRAM interface, This major update to the convenience sdram
UART
- 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。-The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
pingpang
- 关于乒乓操作的，对于数据缓存有很大的用处-On the ping-pong operation of data cache for the great usefulness of
pingpong
- 实现了乒乓操作，用多路选择器来实现，简单易懂。-Achieved a ping-pong operation, With the MUX to achieve， easy to understand
dpram2
- ram的读写，使用状态机完成，两片ram实现乒乓操作-ram read and write, using the state machine completed, two ping-pong operation to achieve ram
sram_060803
- SRAM的读写代码，对SRAM进行了乒乓操作，用VHDL语言进行设计，很有参考价值，甚至可以直接复制代码来进行自己的设计-SRAM read and write code, ping-pong operation carried out on the SRAM, using VHDL language design, of great reference value, or even directly copy the code to
FPGA_common_idea
- 本文讨论的四种常用FPGA/CPLD 设计思想与技巧：乒乓操作、串并转换、流水线操作、数据接口同步化，都是FPGA/CPLD 逻辑设计的内在规律的体现，合理地采用这些设计思想能在FPGA/CPLD 设计工作种取得事半功倍的效果。-This article discusses the four commonly used FPGA/CPLD design ideas and techniques: ping-pong operation,
OK-fifotest-important_high_to_low
- 实现了FIFO的乒乓操作，低速到高速的变化。-Achieve pingpang operation of FIFO
OK-fifotest-important_low_to_high
- 高速到低速的FIFO乒乓操作，已经测试通过-Achieve the pingpang operation of FIFO
verilog_pingpang
- verilog 语言的写的乒乓操作，通过两个寄存器实现。-verilog language, written in ping-pang operation, achieved through two registers.
edma_pingpong_1D_FS0
- 描述了EDMA在乒乓操作中数据传输过程,是一个示例程序.-This is a program of edma for transmitting.
Senior-Advanced-FPGA-design
- FPGA设计高级进阶，讲述了流水线，乒乓操作，异步时钟域处理，状态机等内容-Senior Advanced FPGA design, about the line, ping-pong operation, asynchronous clock domain processing, state machine, etc.
Verilog_pingpang
- 其实乒乓操作用面积换速度，本文件是用verilog实现乒乓操作-In fact, with an area for ping-pong operation speed, this document is to achieve pong operation verilog
SDRAM
- sdram，在fpga数据传递领域应用广泛，乒乓操作，不同频域的数据传递，都靠sdram来转换。-SDRAM VHDL FPGA FIFO
FPGA-design-ideas-and-techniques
- FPGA 设计的四种常用思想与技巧包括：乒乓操作，流水线操作，串并转换技巧，数据接口同步方法-The four commonly used FPGA design ideas and techniques include: ping-pong operation, pipelining, and convert the string technique, synchronous data interface methods
pingpang
- FIFO读写，用使用状态机完成两片FIFO读写，乒乓操作。-FIFO read and write, using the state machine complete with two FIFO read and write, ping-pong operation.
real_module
- 对进来的数据进行乒乓操作，例如0-63出来的结果是31-0,63-32.进来和出去为同一时钟，且都是流水线方式，结构为双口RAM.-Ping-pong on the incoming data operations, such as 0-63, the results are 31-0,63-32. Come in and out of the same clock, and are pipelined, the structure o
Four-FPGA-design-techniques
- FPGA设计的四种常用思想与技巧，包括乒乓操作、串并转换、流水线操作、数据接口同步化-FPGA design of the four common ideas and techniques, including the operation of ping-pong, SERDES, pipelining, synchronization of data interface
FHT_example
- 面积和速度的互换是FPGA/CPLD设计的一个重要思想。乒乓操作、串并转换-The balance between area and speed is a important idea in the design of FPGA/CPLD. Ping-pong operation、the conversion between series and parellel