文件名称:Faraday Mixed-size Placement Benchmarks [vlsi] [IC]
- 所属分类：
- 其他行业
- 资源属性：
- [Linux] [Perl] [源码]
- 上传时间：
- 2021-08-28
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- 7.08mb
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- 提 供 者：
- ahimsafollower@gmail.com
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ICCAD 2004 Faraday Mixed-size Benchmarks with routing information
Faraday Corp. recently released three benchmarks, originally intended
for comparisons between structured and conventional ASICs. We apply to
these benchmarks a standard ASIC design flow to generate five
mixed-size designs. Faraday benchmarks include three commonly-used
functional blocks: (I) 16-bit DSP, (II) 32-bit RISC CPU and (III)
DMA. Other details on these benchmarks such as the EDA Tools used by
Faraday, implementation conditions, settings etc. can be found in on
the faraday web-site. To minimize the impact of routing on the results
of the accounted placement approaches, we avoid clock-tree generation
and power routing in our flows. However, both clock-trees and power
rails can be built on theses benchmarks. Following is the descr iption
of our ASIC flow which we used for generating the mixed-size
benchmarks from the original netlists.
Faraday Corp. recently released three benchmarks, originally intended
for comparisons between structured and conventional ASICs. We apply to
these benchmarks a standard ASIC design flow to generate five
mixed-size designs. Faraday benchmarks include three commonly-used
functional blocks: (I) 16-bit DSP, (II) 32-bit RISC CPU and (III)
DMA. Other details on these benchmarks such as the EDA Tools used by
Faraday, implementation conditions, settings etc. can be found in on
the faraday web-site. To minimize the impact of routing on the results
of the accounted placement approaches, we avoid clock-tree generation
and power routing in our flows. However, both clock-trees and power
rails can be built on theses benchmarks. Following is the descr iption
of our ASIC flow which we used for generating the mixed-size
benchmarks from the original netlists.
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下载文件列表
压缩包 : FARADAY_ICCAD04Bench.rar 列表 FARADAY_ICCAD04Bench/DMA/BOOKSHELF/dma_BS.aux FARADAY_ICCAD04Bench/DMA/BOOKSHELF/dma_BS.nets FARADAY_ICCAD04Bench/DMA/BOOKSHELF/dma_BS.nodes FARADAY_ICCAD04Bench/DMA/BOOKSHELF/dma_BS.pl FARADAY_ICCAD04Bench/DMA/BOOKSHELF/dma_BS.scl FARADAY_ICCAD04Bench/DMA/BOOKSHELF/dma_BS.wts FARADAY_ICCAD04Bench/DMA/def/dma.def FARADAY_ICCAD04Bench/DMA/dma.aux FARADAY_ICCAD04Bench/DMA/lef/dma.lef FARADAY_ICCAD04Bench/DMA/seultra_script.se FARADAY_ICCAD04Bench/DSP1/BOOKSHELF/dsp1_BS.aux FARADAY_ICCAD04Bench/DSP1/BOOKSHELF/dsp1_BS.nets FARADAY_ICCAD04Bench/DSP1/BOOKSHELF/dsp1_BS.nodes FARADAY_ICCAD04Bench/DSP1/BOOKSHELF/dsp1_BS.pl FARADAY_ICCAD04Bench/DSP1/BOOKSHELF/dsp1_BS.scl FARADAY_ICCAD04Bench/DSP1/BOOKSHELF/dsp1_BS.wts FARADAY_ICCAD04Bench/DSP1/def/dsp1.def FARADAY_ICCAD04Bench/DSP1/dsp1.aux FARADAY_ICCAD04Bench/DSP1/lef/dsp1.lef FARADAY_ICCAD04Bench/DSP1/seultra_script.se FARADAY_ICCAD04Bench/DSP2/BOOKSHELF/dsp2_BS.aux FARADAY_ICCAD04Bench/DSP2/BOOKSHELF/dsp2_BS.nets FARADAY_ICCAD04Bench/DSP2/BOOKSHELF/dsp2_BS.nodes FARADAY_ICCAD04Bench/DSP2/BOOKSHELF/dsp2_BS.pl FARADAY_ICCAD04Bench/DSP2/BOOKSHELF/dsp2_BS.scl FARADAY_ICCAD04Bench/DSP2/BOOKSHELF/dsp2_BS.wts FARADAY_ICCAD04Bench/DSP2/def/dsp2.def FARADAY_ICCAD04Bench/DSP2/dsp2.aux FARADAY_ICCAD04Bench/DSP2/lef/dsp2.lef FARADAY_ICCAD04Bench/DSP2/seultra_script.se FARADAY_ICCAD04Bench/README FARADAY_ICCAD04Bench/RISC1/BOOKSHELF/risc1_BS.aux FARADAY_ICCAD04Bench/RISC1/BOOKSHELF/risc1_BS.nets FARADAY_ICCAD04Bench/RISC1/BOOKSHELF/risc1_BS.nodes FARADAY_ICCAD04Bench/RISC1/BOOKSHELF/risc1_BS.pl FARADAY_ICCAD04Bench/RISC1/BOOKSHELF/risc1_BS.scl FARADAY_ICCAD04Bench/RISC1/BOOKSHELF/risc1_BS.wts FARADAY_ICCAD04Bench/RISC1/def/risc1.def FARADAY_ICCAD04Bench/RISC1/lef/risc1.lef FARADAY_ICCAD04Bench/RISC1/risc1.aux FARADAY_ICCAD04Bench/RISC1/seultra_script.se FARADAY_ICCAD04Bench/RISC2/BOOKSHELF/risc2_BS.aux FARADAY_ICCAD04Bench/RISC2/BOOKSHELF/risc2_BS.nets FARADAY_ICCAD04Bench/RISC2/BOOKSHELF/risc2_BS.nodes FARADAY_ICCAD04Bench/RISC2/BOOKSHELF/risc2_BS.pl FARADAY_ICCAD04Bench/RISC2/BOOKSHELF/risc2_BS.scl FARADAY_ICCAD04Bench/RISC2/BOOKSHELF/risc2_BS.wts FARADAY_ICCAD04Bench/RISC2/def/risc2.def FARADAY_ICCAD04Bench/RISC2/lef/risc2.lef FARADAY_ICCAD04Bench/RISC2/risc2.aux FARADAY_ICCAD04Bench/RISC2/seultra_script.se FARADAY_ICCAD04Bench/DMA/BOOKSHELF FARADAY_ICCAD04Bench/DMA/def FARADAY_ICCAD04Bench/DMA/lef FARADAY_ICCAD04Bench/DSP1/BOOKSHELF FARADAY_ICCAD04Bench/DSP1/def FARADAY_ICCAD04Bench/DSP1/lef FARADAY_ICCAD04Bench/DSP2/BOOKSHELF FARADAY_ICCAD04Bench/DSP2/def FARADAY_ICCAD04Bench/DSP2/lef FARADAY_ICCAD04Bench/RISC1/BOOKSHELF FARADAY_ICCAD04Bench/RISC1/def FARADAY_ICCAD04Bench/RISC1/lef FARADAY_ICCAD04Bench/RISC2/BOOKSHELF FARADAY_ICCAD04Bench/RISC2/def FARADAY_ICCAD04Bench/RISC2/lef FARADAY_ICCAD04Bench/DMA FARADAY_ICCAD04Bench/DSP1 FARADAY_ICCAD04Bench/DSP2 FARADAY_ICCAD04Bench/RISC1 FARADAY_ICCAD04Bench/RISC2 FARADAY_ICCAD04Bench