de1_soc_nes

de1_soc_nes\quartus

de1_soc_nes\quartus\.qsys_edit

de1_soc_nes\quartus\.qsys_edit\de1_soc_nes.xml

de1_soc_nes\quartus\.qsys_edit\de1_soc_nes_schematic.nlv

de1_soc_nes\quartus\.qsys_edit\filters.xml

de1_soc_nes\quartus\.qsys_edit\hps.xml

de1_soc_nes\quartus\.qsys_edit\hps_schematic.nlv

de1_soc_nes\quartus\.qsys_edit\preferences.xml

de1_soc_nes\quartus\c5_pin_model_dump.txt

de1_soc_nes\quartus\db

de1_soc_nes\quartus\de1_soc_nes.pin

de1_soc_nes\quartus\de1_soc_nes.qpf

de1_soc_nes\quartus\de1_soc_nes.qsf

de1_soc_nes\quartus\de1_soc_nes.qws

de1_soc_nes\quartus\greybox_tmp

de1_soc_nes\quartus\greybox_tmp\cbx_args.txt

de1_soc_nes\quartus\hps

de1_soc_nes\quartus\hps.qsys

de1_soc_nes\quartus\hps.sopcinfo

de1_soc_nes\quartus\hps\hps.bsf

de1_soc_nes\quartus\hps\hps.cmp

de1_soc_nes\quartus\hps\hps.html

de1_soc_nes\quartus\hps\hps.xml

de1_soc_nes\quartus\hps\hps_bb.v

de1_soc_nes\quartus\hps\hps_generation.rpt

de1_soc_nes\quartus\hps\hps_inst.v

de1_soc_nes\quartus\hps\hps_inst.vhd

de1_soc_nes\quartus\hps\synthesis

de1_soc_nes\quartus\hps\synthesis\hps.debuginfo

de1_soc_nes\quartus\hps\synthesis\hps.qip

de1_soc_nes\quartus\hps\synthesis\hps.regmap

de1_soc_nes\quartus\hps\synthesis\hps.v

de1_soc_nes\quartus\hps\synthesis\hps_hps_0_hps.svd

de1_soc_nes\quartus\hps\synthesis\submodules

de1_soc_nes\quartus\hps\synthesis\submodules\altdq_dqs2_acv_connect_to_hard_phy_cyclonev.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_packets_to_master.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_sc_fifo.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_st_bytes_to_packets.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_st_clock_crosser.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_st_idle_inserter.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_st_idle_remover.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_st_jtag_interface.sdc

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_st_jtag_interface.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_st_packets_to_bytes.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_st_pipeline_base.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_avalon_st_pipeline_stage.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_default_burst_converter.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_incr_burst_converter.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_jtag_dc_streaming.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_jtag_sld_node.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_jtag_streaming.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_mem_if_dll_cyclonev.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_mem_if_hard_memory_controller_top_cyclonev.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_mem_if_hhp_qseq_synth_top.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_mem_if_oct_cyclonev.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_address_alignment.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_arbitrator.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_axi_master_ni.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_axi_slave_ni.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_burst_adapter.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_burst_adapter_13_1.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_burst_adapter_new.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_burst_adapter_uncmpr.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_burst_uncompressor.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_master_agent.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_master_translator.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_reorder_memory.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_slave_agent.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_slave_translator.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_traffic_limiter.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_merlin_width_adapter.sv

de1_soc_nes\quartus\hps\synthesis\submodules\altera_reset_controller.sdc

de1_soc_nes\quartus\hps\synthesis\submodules\altera_reset_controller.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_reset_synchronizer.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_std_synchronizer_nocut.v

de1_soc_nes\quartus\hps\synthesis\submodules\altera_wrap_burst_converter.sv

de1_soc_nes\quartus\hps\synthesis\submodules\hps.pre.xml

de1_soc_nes\quartus\hps\synthesis\submodules\hps_AC_ROM.hex

de1_soc_nes\quartus\hps\synthesis\submodules\hps_button_pio.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_dipsw_pio.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_hps_0.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_hps_0_fpga_interfaces.sv

de1_soc_nes\quartus\hps\synthesis\submodules\hps_hps_0_hps_io.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_hps_0_hps_io_border.sdc

de1_soc_nes\quartus\hps\synthesis\submodules\hps_hps_0_hps_io_border.sv

de1_soc_nes\quartus\hps\synthesis\submodules\hps_inst_ROM.hex

de1_soc_nes\quartus\hps\synthesis\submodules\hps_irq_mapper.sv

de1_soc_nes\quartus\hps\synthesis\submodules\hps_irq_mapper_001.sv

de1_soc_nes\quartus\hps\synthesis\submodules\hps_jtag_uart.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_led_pio.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_master_non_sec.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_master_non_sec_b2p_adapter.sv

de1_soc_nes\quartus\hps\synthesis\submodules\hps_master_non_sec_p2b_adapter.sv

de1_soc_nes\quartus\hps\synthesis\submodules\hps_master_non_sec_timing_adt.sv

de1_soc_nes\quartus\hps\synthesis\submodules\hps_mm_interconnect_0.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_mm_interconnect_0_avalon_st_adapter.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_mm_interconnect_0_avalon_st_adapter_001.v

de1_soc_nes\quartus\hps\synthesis\submodules\hps_mm_interconnect_0_avalon_st_adapter_001_error_adapter_0.sv

de1_soc_nes\quartus\hps\synthesis\submodules\hps_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv