文件名称:6_XADC
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基于FPGA，硬件平台：basys3，软件平台：vivado。描述语言：verilog。 实现XADC采集双路外部电压输入。-Based on the FPGA hardware platform, software platform: basys3, vivado. Descr iption: verilog. The implementation of XADC acquisition dual external voltage input.
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下载文件列表
6_XADC\file_xadc\smg_disp.vhd
......\.........\ug480.v
......\.........\ug480.xdc
......\.........\xadc_top.v
......\lab_xadc\lab_xadc.cache\wt\synthesis.wdf
......\........\..............\..\webtalk_pa.xml
......\........\.........runs\.jobs\vrs_config_1.xml
......\........\.............\.....\vrs_config_2.xml
......\........\.............\clk_wiz_0_synth_1\.Vivado Synthesis.queue.rst
......\........\.............\.................\.vivado.begin.rst
......\........\.............\.................\.vivado.end.rst
......\........\.............\.................\.Xil\clk_wiz_0_propImpl.xdc
......\........\.............\.................\clk_wiz_0.dcp
......\........\.............\.................\clk_wiz_0.tcl
......\........\.............\.................\clk_wiz_0.vds
......\........\.............\.................\clk_wiz_0_utilization_synth.pb
......\........\.............\.................\clk_wiz_0_utilization_synth.rpt
......\........\.............\.................\dont_touch.xdc
......\........\.............\.................\gen_run.xml
......\........\.............\.................\htr.txt
......\........\.............\.................\ISEWrap.js
......\........\.............\.................\ISEWrap.sh
......\........\.............\.................\project.wdf
......\........\.............\.................\rundef.js
......\........\.............\.................\runme.bat
......\........\.............\.................\runme.log
......\........\.............\.................\runme.sh
......\........\.............\.................\vivado.jou
......\........\.............\.................\vivado.pb
......\........\.............\impl_1\.init_design.begin.rst
......\........\.............\......\.init_design.end.rst
......\........\.............\......\.opt_design.begin.rst
......\........\.............\......\.opt_design.end.rst
......\........\.............\......\.place_design.begin.rst
......\........\.............\......\.place_design.end.rst
......\........\.............\......\.route_design.begin.rst
......\........\.............\......\.route_design.end.rst
......\........\.............\......\.Vivado Implementation.queue.rst
......\........\.............\......\.vivado.begin.rst
......\........\.............\......\.vivado.end.rst
......\........\.............\......\.write_bitstream.begin.rst
......\........\.............\......\.write_bitstream.end.rst
......\........\.............\......\gen_run.xml
......\........\.............\......\htr.txt
......\........\.............\......\init_design.pb
......\........\.............\......\ISEWrap.js
......\........\.............\......\ISEWrap.sh
......\........\.............\......\opt_design.pb
......\........\.............\......\place_design.pb
......\........\.............\......\project.wdf
......\........\.............\......\route_design.pb
......\........\.............\......\rundef.js
......\........\.............\......\runme.bat
......\........\.............\......\runme.log
......\........\.............\......\runme.sh
......\........\.............\......\usage_statistics_webtalk.html
......\........\.............\......\usage_statistics_webtalk.xml
......\........\.............\......\vivado.jou
......\........\.............\......\vivado.pb
......\........\.............\......\write_bitstream.pb
......\........\.............\......\xadc_top.bit
......\........\.............\......\xadc_top.tcl
......\........\.............\......\xadc_top.vdi
......\........\.............\......\xadc_top_clock_utilization_placed.rpt
......\........\.............\......\xadc_top_control_sets_placed.rpt
......\........\.............\......\xadc_top_drc_routed.pb
......\........\.............\......\xadc_top_drc_routed.rpt
......\........\.............\......\xadc_top_io_placed.rpt
......\........\.............\......\xadc_top_opt.dcp
......\........\.............\......\xadc_top_placed.dcp
......\........\.............\......\xadc_top_power_routed.rpt
......\........\.............\......\xadc_top_power_summary_routed.pb
......\........\.............\