文件名称:Example-b3-1
介绍说明－－下载内容均来自于网络，请自行研究使用
“\Example-b3-1\uart_regs\src”目录下为设计源文件
“\Example-b3-1\uart_regs\core”目录下为Altera的IP宏功能模块
“\Example-b3-1\uart_regs\sim\funcsim”目录下为功能仿真文件
“\Example-b3-1\uart_regs\sim\parsim”目录下为时序仿真文件
“\Example-b3-1\uart_regs\dev”目录下为工程文件（包含了约束、综合、布局布线的过程文件和结果文件）-Under \ Example-b3-1 \ uart_regs \ src directory for the design source files
Under \ Example-b3-1 \ uart_regs \ core directory for Altera s IP megafunction
Under \ Example-b3-1 \ uart_regs \ sim \ funcsim directory for functional simulation file
Under \ Example-b3-1 \ uart_regs \ sim \ parsim directory for timing simulation file
\ Example-b3-1 \ uart_regs \ dev directory for the project file (containing the constraints, synthesis, placement and routing process and result files)
“\Example-b3-1\uart_regs\core”目录下为Altera的IP宏功能模块
“\Example-b3-1\uart_regs\sim\funcsim”目录下为功能仿真文件
“\Example-b3-1\uart_regs\sim\parsim”目录下为时序仿真文件
“\Example-b3-1\uart_regs\dev”目录下为工程文件（包含了约束、综合、布局布线的过程文件和结果文件）-Under \ Example-b3-1 \ uart_regs \ src directory for the design source files
Under \ Example-b3-1 \ uart_regs \ core directory for Altera s IP megafunction
Under \ Example-b3-1 \ uart_regs \ sim \ funcsim directory for functional simulation file
Under \ Example-b3-1 \ uart_regs \ sim \ parsim directory for timing simulation file
\ Example-b3-1 \ uart_regs \ dev directory for the project file (containing the constraints, synthesis, placement and routing process and result files)
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Example-b3-1\uart_regs\core\myfifo_10.v
............\.........\....\myfifo_10_bb.v
............\.........\....\myfifo_10_wave0.jpg
............\.........\....\myfifo_10_waveforms.html
............\.........\....\myfifo_8.v
............\.........\....\myfifo_8_bb.v
............\.........\....\myfifo_8_wave0.jpg
............\.........\....\myfifo_8_waveforms.html
............\.........\dev\chip_editor.acv
............\.........\...\cmp_state.ini
............\.........\...\db\add_sub_1jh.tdf
............\.........\...\..\add_sub_1sh.tdf
............\.........\...\..\add_sub_2sh.tdf
............\.........\...\..\add_sub_3sh.tdf
............\.........\...\..\add_sub_6sh.tdf
............\.........\...\..\add_sub_dhh.tdf
............\.........\...\..\add_sub_ehh.tdf
............\.........\...\..\add_sub_fhh.tdf
............\.........\...\..\add_sub_fth.tdf
............\.........\...\..\add_sub_ihh.tdf
............\.........\...\..\add_sub_lth.tdf
............\.........\...\..\add_sub_rih.tdf
............\.........\...\..\altsyncram_4pl1.tdf
............\.........\...\..\altsyncram_apb1.tdf
............\.........\...\..\altsyncram_gml1.tdf
............\.........\...\..\altsyncram_mmb1.tdf
............\.........\...\..\a_dpfifo_4nl.tdf
............\.........\...\..\a_dpfifo_lh81.tdf
............\.........\...\..\a_dpfifo_rll.tdf
............\.........\...\..\a_dpfifo_ui81.tdf
............\.........\...\..\a_fefifo_66f.tdf
............\.........\...\..\a_fefifo_qve.tdf
............\.........\...\..\cntr_9d7.tdf
............\.........\...\..\cntr_tcb.tdf
............\.........\...\..\dpram_2h51.tdf
............\.........\...\..\dpram_81k.tdf
............\.........\...\..\dpram_h2k.tdf
............\.........\...\..\dpram_pf51.tdf
............\.........\...\..\mux_egc.tdf
............\.........\...\..\mux_jgc.tdf
............\.........\...\..\prev_cmp_uart_regs.asm.qmsg
............\.........\...\..\prev_cmp_uart_regs.fit.qmsg
............\.........\...\..\prev_cmp_uart_regs.map.qmsg
............\.........\...\..\prev_cmp_uart_regs.qmsg
............\.........\...\..\prev_cmp_uart_regs.sim.qmsg
............\.........\...\..\prev_cmp_uart_regs.tan.qmsg
............\.........\...\..\scfifo_eaq.tdf
............\.........\...\..\scfifo_eb81.tdf
............\.........\...\..\scfifo_nbq.tdf
............\.........\...\..\scfifo_nc81.tdf
............\.........\...\..\uart_regs-sim.vwf
............\.........\...\..\uart_regs.ace_cmp.cdb
............\.........\...\..\uart_regs.ace_cmp.hdb
............\.........\...\..\uart_regs.ae.hdb
............\.........\...\..\uart_regs.asm.qmsg
............\.........\...\..\uart_regs.cbx.xml
............\.........\...\..\uart_regs.cmp.cdb
............\.........\...\..\uart_regs.cmp.hdb
............\.........\...\..\uart_regs.cmp.kpt
............\.........\...\..\uart_regs.cmp.logdb
............\.........\...\..\uart_regs.cmp.rdb
............\.........\...\..\uart_regs.cmp.tdb
............\.........\...\..\uart_regs.cmp0.ddb
............\.........\...\..\uart_regs.db_info
............\.........\...\..\uart_regs.eco.cdb
............\.........\...\..\uart_regs.eds_overflow
............\.........\...\..\uart_regs.fit.qmsg
............\.........\...\..\uart_regs.fnsim.hdb
............\.........\...\..\uart_regs.fnsim.qmsg
............\.........\...\..\uart_regs.hier_info
............\.........\...\..\uart_regs.hif
............\.........\...\..\uart_regs.lpc.html
............\.........\...\..\uart_regs.lpc.rdb
............\.........\...\..\uart_regs.lpc.txt
............\.........\...\..\uart_regs.map.cdb
............\.........\...\..\uart_regs.map.hdb
............\.........\...\..\uart_regs.map.logdb
............\.........\...\..\uart_regs.map.qmsg
............\.........\...\..\uart_regs.pre_map.cdb
............\.........\...\..\uart_regs.pre_map.hdb
............\.........\...\..\uart_regs.rpp.qmsg
............\.........\...\..\uart_regs.rtlv.hdb
............\.........\...\..\uart_regs.rtlv_sg.cdb
............\.........\...\..\uart_regs.rtlv_sg_swap.cdb
............\.........\...\..\uart_regs.sgate.rvd
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