文件名称:38504873-pll
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Introduction
In 2004 Octavian Florescu created the UW ASIC group. At that time, the
analog subgroup of the UW ASIC group was involved in the design of a PLL.
The topology of that PLL, which is now referred to as Phase Locked Loop
Version 1, is documented herein.
In 2004 Octavian Florescu created the UW ASIC group. At that time, the
analog subgroup of the UW ASIC group was involved in the design of a PLL.
The topology of that PLL, which is now referred to as Phase Locked Loop
Version 1, is documented herein.
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38504873-pll.pdf