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[VHDL编程Chip_hardware_description_language_related_program

说明:硬件描述语言相关芯片程序源码Chip hardware descr iption language-related program source code-Chip hardware descr iption language-related program source Chip hardware descr iption language-related program source code
<wangqiang> 在 2025-02-27 上传 | 大小:318kb | 下载:0

[VHDL编程Intelligent_washing_control_system_vhdl_language.r

说明:实现智能洗衣机控制系统vhdl语言Intelligent washing control system vhdl language-Intelligent washing control system vhdl language Intelligent washing control system vhdl language
<xiaoli> 在 2025-02-27 上传 | 大小:106kb | 下载:0

[VHDL编程fpga_frequency_circuit_design

说明:fpga分频电路设计fpga frequency circuit design讲解详细,分频电路的分类等-fpga frequency circuit design fpga frequency circuit design explained in detail the classification of sub-frequency circuit
<xiaoli> 在 2025-02-27 上传 | 大小:143kb | 下载:0

[VHDL编程Classic_application_of_EDA_technologies

说明:EDA技术经典应用很不错哦的vhdl例程,eda的重要组成部分-Classic application of EDA technology is good, oh the vhdl routines, eda an important part of
<xiaoli> 在 2025-02-27 上传 | 大小:295kb | 下载:0

[VHDL编程spartan2e_and_spartan3_xc2s300e-6pq208

说明:spartan2e 和spartan3以及spartan2e系列芯片的xc2s300e-6pq208的资料(datasheet)-spartan2e and spartan3 and spartan2e series chip xc2s300e-6pq208 data (datasheet)
<关明明> 在 2025-02-27 上传 | 大小:3.09mb | 下载:0

[VHDL编程lab_manual_tutorial

说明:用赛灵思ISE9.2和Spartan-3E设计的四位计数器-4- Bit Counter with Xilinx ISE 9.2 and Spartan 3E
<飞飞三号> 在 2025-02-27 上传 | 大小:312kb | 下载:0

[VHDL编程Lab01

说明:快速熟悉ISE软件的使用,适合初学者,是一系列小操作流程的集合。-To become familiar with using Xilinx ISE to draw schematic representations of PLD circuits To become familiar with using Xilinx ISE to conduct graphical waveform simulations of PLD circ
<飞飞三号> 在 2025-02-27 上传 | 大小:1.19mb | 下载:0

[VHDL编程Tutorial_5

说明:一个序列检测器的FPGA设计实验,通过LED灯显示,基于Spartan-3e开发板-The sequence detector will look for the input series “10010.” LED’s will show how much of the series has been detected and when the entire series has been entered an additional L
<飞飞三号> 在 2025-02-27 上传 | 大小:1.17mb | 下载:0

[VHDL编程Tutorial09_Clock

说明:基于Spartan-3e的数码管显示时钟程序的设计,整个流程讲解详细。-A very important concept in digital design is that of the clock. A clock is used to synchronize systems in digital logic, and provides a convenient way to keep track of real time. Anot
<飞飞三号> 在 2025-02-27 上传 | 大小:405kb | 下载:0

[VHDL编程mix

说明:本代码是基于Verilog语言,是在伽罗瓦域GF(2^8)上完成加法和乘法运算,主要完成ASE加密的列混合运算-This code is based on the Verilog language, is the Galois field GF (2 ^ 8) on the completion of addition and multiplication, the main column of the completion of AS
<钟佳荣> 在 2025-02-27 上传 | 大小:225kb | 下载:0

[VHDL编程20100728

说明:一种很好的读后清零寄存器的设计思路与方法,对FPGA寄存器设计设计具有很好的启发-Reading a good clear design concept and method registers, registers on the FPGA design has good design inspiration
<lifei> 在 2025-02-27 上传 | 大小:75kb | 下载:0

[VHDL编程shift_reg

说明:actel fpga ap030 regshift示例-actel fpga ap030 regshift
<liu> 在 2025-02-27 上传 | 大小:291kb | 下载:0
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