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[单片机(51,AVR,MSP430等)qiangdaqi

说明:自己写的单片机课程设计八路抢答器,能想到的功能都有,有倒计时,报警,预置数等-Microcontroller to write their own curriculum design, eight-way Responder can think of function, countdown, alarm, preset number, etc. ..
<lizhi> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程mul

说明:八位乘法器的VHDL程序,按照乘法的运算规则利用分支语句判断所有情况,最后累加求的结果-8 multiplier VHDL programs, in accordance with rules of multiplication operations to determine all the circumstances of the use of a branch statement, the final cumulative resu
<sujunlong > 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程fir

说明:用状态机编写的FIR,verilog代码,已经经过仿真-With the state machine written in FIR, verilog code, and has passed through simulation
<于水洋> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程fir2

说明:用memory编写的FIR,比较适合入门学习,已经过仿真,-Prepared with the memory of FIR, more suitable for entry-learning, has been simulation,
<于水洋> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程fir_memory

说明:用memory编写的verilog代码,可用于工程应用,已经过仿真-Verilog code written with the memory can be used for engineering applications, has been simulation
<于水洋> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程ALU_ZMR

说明:简单的ALU运算模块,可实现加法减法移位等运算-A simple ALU operation modules, enabling operations such as addition subtraction shift
<于水洋> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程qiangdaqi1

说明:这是一个数电的4选手抢答器的设计报告 内容详细具体 请查收-This one of the few -- six players Responder Design Report details specific Check-This is one of four players to answer in a few electrical device designed to report detailed and specific pl
<不点> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程Audio_Bit_Counter

说明:The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
<gasha> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程Audio_In_Deserializer

说明:The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
<gasha> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程Audio_Out_Serializer

说明:The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
<gasha> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程Clock_Edge

说明:The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
<gasha> 在 2025-02-28 上传 | 大小:1kb | 下载:0

[VHDL编程SYNC_FIFO

说明:The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
<gasha> 在 2025-02-28 上传 | 大小:1kb | 下载:0
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