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[单片机(51,AVR,MSP430等)] qiangdaqi
说明:自己写的单片机课程设计八路抢答器,能想到的功能都有,有倒计时,报警,预置数等-Microcontroller to write their own curriculum design, eight-way Responder can think of function, countdown, alarm, preset number, etc. ..<lizhi> 在 2025-02-28 上传 | 大小:1kb | 下载:0
[VHDL编程] fir_memory
说明:用memory编写的verilog代码,可用于工程应用,已经过仿真-Verilog code written with the memory can be used for engineering applications, has been simulation<于水洋> 在 2025-02-28 上传 | 大小:1kb | 下载:0
[VHDL编程] qiangdaqi1
说明:这是一个数电的4选手抢答器的设计报告 内容详细具体 请查收-This one of the few -- six players Responder Design Report details specific Check-This is one of four players to answer in a few electrical device designed to report detailed and specific pl<不点> 在 2025-02-28 上传 | 大小:1kb | 下载:0
[VHDL编程] Audio_Bit_Counter
说明:The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu<gasha> 在 2025-02-28 上传 | 大小:1kb | 下载:0
[VHDL编程] Audio_In_Deserializer
说明:The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu<gasha> 在 2025-02-28 上传 | 大小:1kb | 下载:0
[VHDL编程] Audio_Out_Serializer
说明:The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu<gasha> 在 2025-02-28 上传 | 大小:1kb | 下载:0
[VHDL编程] Clock_Edge
说明:The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu<gasha> 在 2025-02-28 上传 | 大小:1kb | 下载:0