搜索资源列表
XUPV2P_User_Guide
- XUPV2P User Guide VirtexII Pro-XUPV2P VirtexII Pro User Guide
XUPV2P_User_Guide
- XUPV2P User Guide VirtexII Pro-XUPV2P VirtexII Pro User Guide
BIST_Circuits
- BIST 电路IP核的VHDL语言源代码，需要的开发环境是QUARTUS II 6.0。-BIST circuits IP core VHDL language source code, the need for the development environment is QUARTUS II 6.0.
Xilinx
- Xilinx可编程逻辑器件的高级应用与设计技巧 全面介绍Xilinx的CoolRunnerII Spartan-3 Virtex-II VirtexII pro等器件的结构特性，以及ISE6及其辅助设计工具。 -Xilinx programmable logic devices and design techniques for advanced applications a comprehensive introduction t
slideshow_256mb
- XUP VirtexII Pro Development board Slideshow_256mb-XUP VirtexII Pro Development board Slideshow_256mb
bist
- design for test Test and Design-for-Test for memory bist-design for test
new_bord_TX_10bitX2_2_5G
- Xilinx VirtexII-pro 的开发板工程文件，它是在ISE开发环境中实现的。连接有RAM、串口、LED灯、Camera-link接口等，实现的从工业相机到光缆的转换。-xilinx virtex2-pro project,camera-link
Xilinx VirtexII datasheet
- Xilinx VirtexII datasheet
Built_in_Demo_rev_1_1
- FPGA virtexii pro音频设计实例，很好用，真的雷奥，，，，，，，，真的真的
cachecontroller_latest.tar
- This project is to develop a direct mapped cache controller for embedded applications. Key Design Features - Direct mapped with configurable address size, line size and number of cache lines - Non Pipeline