文件名称:trafficlight
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程序提供了一种简单高效的模拟交通灯控制器的算法，非常实用-Procedure provides a simple and efficient simulation algorithm for the traffic light controller, very useful
相关搜索： 模拟交通灯
(系统自动生成,下载前可以参看下载内容)
下载文件列表
交通灯控制器
............\db
............\..\Vhdl10.asm.qmsg
............\..\Vhdl10.cbx.xml
............\..\Vhdl10.cmp.cdb
............\..\Vhdl10.cmp.hdb
............\..\Vhdl10.cmp.kpt
............\..\Vhdl10.cmp.logdb
............\..\Vhdl10.cmp.rdb
............\..\Vhdl10.cmp.tdb
............\..\Vhdl10.cmp0.ddb
............\..\Vhdl10.dbp
............\..\Vhdl10.db_info
............\..\Vhdl10.eco.cdb
............\..\Vhdl10.eds_overflow
............\..\Vhdl10.fit.qmsg
............\..\Vhdl10.hier_info
............\..\Vhdl10.hif
............\..\Vhdl10.map.cdb
............\..\Vhdl10.map.hdb
............\..\Vhdl10.map.logdb
............\..\Vhdl10.map.qmsg
............\..\Vhdl10.pre_map.cdb
............\..\Vhdl10.pre_map.hdb
............\..\Vhdl10.psp
............\..\Vhdl10.rtlv.hdb
............\..\Vhdl10.rtlv_sg.cdb
............\..\Vhdl10.rtlv_sg_swap.cdb
............\..\Vhdl10.sgdiff.cdb
............\..\Vhdl10.sgdiff.hdb
............\..\Vhdl10.signalprobe.cdb
............\..\Vhdl10.sim.hdb
............\..\Vhdl10.sim.qmsg
............\..\Vhdl10.sim.rdb
............\..\Vhdl10.sim.vwf
............\..\Vhdl10.sld_design_entry.sci
............\..\Vhdl10.sld_design_entry_dsc.sci
............\..\Vhdl10.smp_dump.txt
............\..\Vhdl10.syn_hier_info
............\..\Vhdl10.tan.qmsg
............\..\wed.zsf
............\Vhdl10.asm.rpt
............\Vhdl10.done
............\Vhdl10.fit.rpt
............\Vhdl10.fit.smsg
............\Vhdl10.fit.summary
............\Vhdl10.flow.rpt
............\Vhdl10.map.rpt
............\Vhdl10.map.summary
............\Vhdl10.pin
............\Vhdl10.qpf
............\Vhdl10.qsf
............\Vhdl10.qws
............\Vhdl10.sim.rpt
............\Vhdl10.tan.rpt
............\Vhdl10.tan.summary
............\Vhdl10.vhd
............\Vhdl10.vwf
............\db
............\..\Vhdl10.asm.qmsg
............\..\Vhdl10.cbx.xml
............\..\Vhdl10.cmp.cdb
............\..\Vhdl10.cmp.hdb
............\..\Vhdl10.cmp.kpt
............\..\Vhdl10.cmp.logdb
............\..\Vhdl10.cmp.rdb
............\..\Vhdl10.cmp.tdb
............\..\Vhdl10.cmp0.ddb
............\..\Vhdl10.dbp
............\..\Vhdl10.db_info
............\..\Vhdl10.eco.cdb
............\..\Vhdl10.eds_overflow
............\..\Vhdl10.fit.qmsg
............\..\Vhdl10.hier_info
............\..\Vhdl10.hif
............\..\Vhdl10.map.cdb
............\..\Vhdl10.map.hdb
............\..\Vhdl10.map.logdb
............\..\Vhdl10.map.qmsg
............\..\Vhdl10.pre_map.cdb
............\..\Vhdl10.pre_map.hdb
............\..\Vhdl10.psp
............\..\Vhdl10.rtlv.hdb
............\..\Vhdl10.rtlv_sg.cdb
............\..\Vhdl10.rtlv_sg_swap.cdb
............\..\Vhdl10.sgdiff.cdb
............\..\Vhdl10.sgdiff.hdb
............\..\Vhdl10.signalprobe.cdb
............\..\Vhdl10.sim.hdb
............\..\Vhdl10.sim.qmsg
............\..\Vhdl10.sim.rdb
............\..\Vhdl10.sim.vwf
............\..\Vhdl10.sld_design_entry.sci
............\..\Vhdl10.sld_design_entry_dsc.sci
............\..\Vhdl10.smp_dump.txt
............\..\Vhdl10.syn_hier_info
............\..\Vhdl10.tan.qmsg
............\..\wed.zsf
............\Vhdl10.asm.rpt
............\Vhdl10.done
............\Vhdl10.fit.rpt
............\Vhdl10.fit.smsg
............\Vhdl10.fit.summary
............\Vhdl10.flow.rpt
............\Vhdl10.map.rpt
............\Vhdl10.map.summary
............\Vhdl10.pin
............\Vhdl10.qpf
............\Vhdl10.qsf
............\Vhdl10.qws
............\Vhdl10.sim.rpt
............\Vhdl10.tan.rpt
............\Vhdl10.tan.summary
............\Vhdl10.vhd
............\Vhdl10.vwf