文件名称:miaobiao
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一个精确的秒表,显示在数码管上。对于初学者使用verilog有很大的帮助,同时注释很详细。-An accurate stopwatch displayed on the digital pipe. For beginners verilog a great help, and very detailed notes.
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下载文件列表
miaobiao
........\db
........\..\logic_util_heursitic.dat
........\..\prev_cmp_switch.qmsg
........\..\switch.amm.cdb
........\..\switch.asm.qmsg
........\..\switch.asm.rdb
........\..\switch.asm_labs.ddb
........\..\switch.cbx.xml
........\..\switch.cmp.bpm
........\..\switch.cmp.cdb
........\..\switch.cmp.hdb
........\..\switch.cmp.kpt
........\..\switch.cmp.logdb
........\..\switch.cmp.rdb
........\..\switch.cmp0.ddb
........\..\switch.cmp1.ddb
........\..\switch.cmp2.ddb
........\..\switch.cmp_merge.kpt
........\..\switch.db_info
........\..\switch.eda.qmsg
........\..\switch.fit.qmsg
........\..\switch.hier_info
........\..\switch.hif
........\..\switch.idb.cdb
........\..\switch.lpc.html
........\..\switch.lpc.rdb
........\..\switch.lpc.txt
........\..\switch.map.bpm
........\..\switch.map.cdb
........\..\switch.map.hdb
........\..\switch.map.kpt
........\..\switch.map.logdb
........\..\switch.map.qmsg
........\..\switch.map.rdb
........\..\switch.map_bb.cdb
........\..\switch.map_bb.hdb
........\..\switch.map_bb.logdb
........\..\switch.pre_map.cdb
........\..\switch.pre_map.hdb
........\..\switch.root_partition.map.reg_db.cdb
........\..\switch.routing.rdb
........\..\switch.rpp.qmsg
........\..\switch.rtlv.hdb
........\..\switch.rtlv_sg.cdb
........\..\switch.rtlv_sg_swap.cdb
........\..\switch.sgate.rvd
........\..\switch.sgate_sm.rvd
........\..\switch.sgdiff.cdb
........\..\switch.sgdiff.hdb
........\..\switch.sld_design_entry.sci
........\..\switch.sld_design_entry_dsc.sci
........\..\switch.smart_action.txt
........\..\switch.sta.qmsg
........\..\switch.sta.rdb
........\..\switch.sta_cmp.8_slow.tdb
........\..\switch.syn_hier_info
........\..\switch.tis_db_list.ddb
........\incremental_db
........\..............\compiled_partitions
........\..............\...................\switch.db_info
........\..............\...................\switch.root_partition.cmp.cdb
........\..............\...................\switch.root_partition.cmp.dfp
........\..............\...................\switch.root_partition.cmp.hdb
........\..............\...................\switch.root_partition.cmp.kpt
........\..............\...................\switch.root_partition.cmp.logdb
........\..............\...................\switch.root_partition.cmp.rcfdb
........\..............\...................\switch.root_partition.map.cdb
........\..............\...................\switch.root_partition.map.dpi
........\..............\...................\switch.root_partition.map.hbdb.cdb
........\..............\...................\switch.root_partition.map.hbdb.hb_info
........\..............\...................\switch.root_partition.map.hbdb.hdb
........\..............\...................\switch.root_partition.map.hbdb.sig
........\..............\...................\switch.root_partition.map.hdb
........\..............\...................\switch.root_partition.map.kpt
........\..............\README
........\modelsim
........\........\switch_tb.cr.mti
........\........\switch_tb.mpf
........\........\switch_tb.v
........\........\tcl_stacktrace.txt
........\........\vsim.wlf
........\........\work
........\........\....\@_opt
........\........\....\.....\vopt2ark7m
........\........\....\.....\vopt5336wn
........\........\....\.....\vopt8wr3sn
........\........\....\.....\vopt9s1b8m
........\........\....\.....\voptdiq85m
........\........\....\.....\voptgxd4wk
........\........\....\.....\voptjhrs1q
........\........\....\.....\voptq1en1q
........\........\....\.....\voptth3j1q
........\........\....\.....\voptyasfyn
........\........\....\.....\voptzs2q7m
........\........\....\.....\_deps
........\........\....\switch
........\........\....\......\verilog.asm
........\........\....\......\verilog.rw
........\........\....\......\_primary.dat