文件名称:Example-b3-1

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  • 书籍源码
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2013-09-16
  • 文件大小:
  • 1.15mb
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  • 0次
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  • che****
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Verilog/VHDL源码的串口示例,“Altera设计基础篇”第3章的串口示例,包括源码和仿真文件等-Verilog/VHDL source serial example, " Altera Design Basics" in Chapter 3 serial examples, including source code and simulation files, etc.
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下载文件列表





Example-b3-1\uart_regs\core\myfifo_10.v

............\.........\....\myfifo_10_bb.v

............\.........\....\myfifo_10_wave0.jpg

............\.........\....\myfifo_10_waveforms.html

............\.........\....\myfifo_8.v

............\.........\....\myfifo_8_bb.v

............\.........\....\myfifo_8_wave0.jpg

............\.........\....\myfifo_8_waveforms.html

............\.........\dev\chip_editor.acv

............\.........\...\cmp_state.ini

............\.........\...\db\add_sub_1jh.tdf

............\.........\...\..\add_sub_dhh.tdf

............\.........\...\..\add_sub_ehh.tdf

............\.........\...\..\add_sub_fhh.tdf

............\.........\...\..\add_sub_ihh.tdf

............\.........\...\..\add_sub_rih.tdf

............\.........\...\..\altsyncram_4pl1.tdf

............\.........\...\..\altsyncram_81m1.tdf

............\.........\...\..\altsyncram_apb1.tdf

............\.........\...\..\altsyncram_gml1.tdf

............\.........\...\..\altsyncram_kul1.tdf

............\.........\...\..\altsyncram_mmb1.tdf

............\.........\...\..\a_dpfifo_2r81.tdf

............\.........\...\..\a_dpfifo_4nl.tdf

............\.........\...\..\a_dpfifo_lh81.tdf

............\.........\...\..\a_dpfifo_pp81.tdf

............\.........\...\..\a_dpfifo_rll.tdf

............\.........\...\..\a_dpfifo_ui81.tdf

............\.........\...\..\a_fefifo_66f.tdf

............\.........\...\..\a_fefifo_qve.tdf

............\.........\...\..\cntr_9d7.tdf

............\.........\...\..\cntr_skb.tdf

............\.........\...\..\cntr_tcb.tdf

............\.........\...\..\dpram_2h51.tdf

............\.........\...\..\dpram_6p51.tdf

............\.........\...\..\dpram_81k.tdf

............\.........\...\..\dpram_h2k.tdf

............\.........\...\..\dpram_pf51.tdf

............\.........\...\..\dpram_tn51.tdf

............\.........\...\..\prev_cmp_uart_regs.asm.qmsg

............\.........\...\..\prev_cmp_uart_regs.fit.qmsg

............\.........\...\..\prev_cmp_uart_regs.map.qmsg

............\.........\...\..\prev_cmp_uart_regs.qmsg

............\.........\...\..\prev_cmp_uart_regs.tan.qmsg

............\.........\...\..\scfifo_eaq.tdf

............\.........\...\..\scfifo_eb81.tdf

............\.........\...\..\scfifo_ij81.tdf

............\.........\...\..\scfifo_nbq.tdf

............\.........\...\..\scfifo_nc81.tdf

............\.........\...\..\scfifo_rk81.tdf

............\.........\...\..\uart_regs-sim.vwf

............\.........\...\..\uart_regs.asm.qmsg

............\.........\...\..\uart_regs.cbx.xml

............\.........\...\..\uart_regs.cmp.cdb

............\.........\...\..\uart_regs.cmp.hdb

............\.........\...\..\uart_regs.cmp.kpt

............\.........\...\..\uart_regs.cmp.logdb

............\.........\...\..\uart_regs.cmp.rdb

............\.........\...\..\uart_regs.cmp.tdb

............\.........\...\..\uart_regs.cmp0.ddb

............\.........\...\..\uart_regs.db_info

............\.........\...\..\uart_regs.eco.cdb

............\.........\...\..\uart_regs.fit.qmsg

............\.........\...\..\uart_regs.hier_info

............\.........\...\..\uart_regs.hif

............\.........\...\..\uart_regs.lpc.html

............\.........\...\..\uart_regs.lpc.rdb

............\.........\...\..\uart_regs.lpc.txt

............\.........\...\..\uart_regs.map.cdb

............\.........\...\..\uart_regs.map.hdb

............\.........\...\..\uart_regs.map.logdb

............\.........\...\..\uart_regs.map.qmsg

............\.........\...\..\uart_regs.pre_map.cdb

............\.........\...\..\uart_regs.pre_map.hdb

............\.........\...\..\uart_regs.rtlv.hdb

............\.........\...\..\uart_regs.rtlv_sg.cdb

............\.........\...\..\uart_regs.rtlv_sg_swap.cdb

............\.........\...\..\uart_regs.sgdiff.cdb

............\.........\...\..\uart_regs.sgdiff.hdb

............\.........\...\..\uart_regs.sld_design_entry.sci

............\.........\...\..\uart_regs.sld_design_entry_dsc.sci

............\.........\...\..\uart_regs.syn_hier_info

............\.........\...\..\uart_regs.tan.qmsg

............\.........\...\..\uart_regs.tis_db_list.ddb

............\......

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