文件名称:dds_work
介绍说明--下载内容均来自于网络,请自行研究使用
verilog语言编写,在Quartus II里仿真DDS的产生,包括所有仿真生成的相关文件--verilog language in the Quartus II DDS in the generation of simulation, including all documents generated by the simulation,
(系统自动生成,下载前可以参看下载内容)
下载文件列表
dds_work\adder1.asm.rpt
........\adder1.bsf
........\adder1.done
........\adder1.fit.rpt
........\adder1.fit.smsg
........\adder1.fit.summary
........\adder1.flow.rpt
........\adder1.map.rpt
........\adder1.map.summary
........\adder1.pin
........\adder1.pof
........\adder1.qsf
........\adder1.sim.rpt
........\adder1.sof
........\adder1.tan.rpt
........\adder1.tan.summary
........\adder1.vhd
........\adder1.vhd.bak
........\adder1.vwf
........\adder2.asm.rpt
........\adder2.bsf
........\adder2.done
........\adder2.fit.rpt
........\adder2.fit.smsg
........\adder2.fit.summary
........\adder2.flow.rpt
........\adder2.map.rpt
........\adder2.map.summary
........\adder2.pin
........\adder2.pof
........\adder2.qsf
........\adder2.sim.rpt
........\adder2.sof
........\adder2.tan.rpt
........\adder2.tan.summary
........\adder2.vhd
........\adder2.vhd.bak
........\adder2.vwf
........\adder3.vhd
........\adder3.vhd.bak
........\addr3.bsf
........\cfq.bsf
........\cfq.vhd
........\cfq.vhd.bak
........\data\cos1.m
........\....\juchi.m
........\....\sanjiao.m
........\....\sanjiao.mif
........\data.MIF
........\data.mif.bak
........\.b\adder1.asm.qmsg
........\..\adder1.asm_labs.ddb
........\..\adder1.cbx.xml
........\..\adder1.cmp.bpm
........\..\adder1.cmp.cdb
........\..\adder1.cmp.ecobp
........\..\adder1.cmp.hdb
........\..\adder1.cmp.logdb
........\..\adder1.cmp.rdb
........\..\adder1.cmp.tdb
........\..\adder1.cmp0.ddb
........\..\adder1.cmp2.ddb
........\..\adder1.cmp_bb.cdb
........\..\adder1.cmp_bb.hdb
........\..\adder1.cmp_bb.logdb
........\..\adder1.cmp_bb.rcf
........\..\adder1.dbp
........\..\adder1.db_info
........\..\adder1.eco.cdb
........\..\adder1.eds_overflow
........\..\adder1.fit.qmsg
........\..\adder1.fnsim.cdb
........\..\adder1.fnsim.hdb
........\..\adder1.fnsim.qmsg
........\..\adder1.hier_info
........\..\adder1.hif
........\..\adder1.map.bpm
........\..\adder1.map.cdb
........\..\adder1.map.ecobp
........\..\adder1.map.hdb
........\..\adder1.map.logdb
........\..\adder1.map.qmsg
........\..\adder1.map_bb.cdb
........\..\adder1.map_bb.hdb
........\..\adder1.map_bb.logdb
........\..\adder1.pre_map.cdb
........\..\adder1.pre_map.hdb
........\..\adder1.psp
........\..\adder1.pss
........\..\adder1.rtlv.hdb
........\..\adder1.rtlv_sg.cdb
........\..\adder1.rtlv_sg_swap.cdb
........\..\adder1.sgdiff.cdb
........\..\adder1.sgdiff.hdb
........\..\adder1.signalprobe.cdb
........\..\adder1.sim.cvwf
........\..\adder1.sim.hdb
........\..\adder1.sim.qmsg
........\..\adder1.sim.rdb
........\..\adder1.simfam