文件名称:uart_state

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [HTML]
  • 上传时间:
  • 2013-04-23
  • 文件大小:
  • 3.16mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • xuxin*****
  • 相关连接:
  • 下载说明:
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介绍说明--下载内容均来自于网络,请自行研究使用

基于状态机编写的串口通信实验,编程语言是Verilog HDL,可发送八位数据,在Altera的EP4CE15F17C8芯片上验证成功。(与另一个发送256位不同的是这个代码比较突出状态机的使用)。-Prepared by the serial communication experiment based on state machine, the programming language is Verilog HDL can transmit eight bits of data, verify on Altera' s EP4CE15F17C8 chip. (Sent with another 256 different code more prominent use of state machines).
(系统自动生成,下载前可以参看下载内容)

下载文件列表





uart_lab\db\logic_util_heursitic.dat

........\..\prev_cmp_uart.qmsg

........\..\uart.ace_cmp.bpm

........\..\uart.ace_cmp.cdb

........\..\uart.ace_cmp.hdb

........\..\uart.amm.cdb

........\..\uart.asm.qmsg

........\..\uart.asm.rdb

........\..\uart.asm_labs.ddb

........\..\uart.atom.rvd

........\..\uart.cbx.xml

........\..\uart.cmp.bpm

........\..\uart.cmp.cdb

........\..\uart.cmp.hdb

........\..\uart.cmp.kpt

........\..\uart.cmp.logdb

........\..\uart.cmp.rdb

........\..\uart.cmp_merge.kpt

........\..\uart.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd

........\..\uart.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd

........\..\uart.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd

........\..\uart.db_info

........\..\uart.eco.cdb

........\..\uart.eda.qmsg

........\..\uart.fit.qmsg

........\..\uart.hier_info

........\..\uart.hif

........\..\uart.idb.cdb

........\..\uart.lpc.html

........\..\uart.lpc.rdb

........\..\uart.lpc.txt

........\..\uart.map.bpm

........\..\uart.map.cdb

........\..\uart.map.hdb

........\..\uart.map.kpt

........\..\uart.map.logdb

........\..\uart.map.qmsg

........\..\uart.map_bb.cdb

........\..\uart.map_bb.hdb

........\..\uart.map_bb.logdb

........\..\uart.pre_map.cdb

........\..\uart.pre_map.hdb

........\..\uart.rpp.qmsg

........\..\uart.rtlv.hdb

........\..\uart.rtlv_sg.cdb

........\..\uart.rtlv_sg_swap.cdb

........\..\uart.sgate.rvd

........\..\uart.sgate_sm.rvd

........\..\uart.sgdiff.cdb

........\..\uart.sgdiff.hdb

........\..\uart.sld_design_entry.sci

........\..\uart.sld_design_entry_dsc.sci

........\..\uart.smart_action.txt

........\..\uart.smp_dump.txt

........\..\uart.sta.qmsg

........\..\uart.sta.rdb

........\..\uart.sta_cmp.8_slow_1200mv_85c.tdb

........\..\uart.syn_hier_info

........\..\uart.tiscmp.fastest_slow_1200mv_0c.ddb

........\..\uart.tiscmp.fastest_slow_1200mv_85c.ddb

........\..\uart.tiscmp.fast_1200mv_0c.ddb

........\..\uart.tiscmp.slow_1200mv_0c.ddb

........\..\uart.tiscmp.slow_1200mv_85c.ddb

........\..\uart.tis_db_list.ddb

........\..\uart.tmw_info

........\incremental_db\compiled_partitions\uart.db_info

........\..............\...................\uart.root_partition.cmp.cdb

........\..............\...................\uart.root_partition.cmp.dfp

........\..............\...................\uart.root_partition.cmp.hdb

........\..............\...................\uart.root_partition.cmp.kpt

........\..............\...................\uart.root_partition.cmp.logdb

........\..............\...................\uart.root_partition.cmp.rcfdb

........\..............\...................\uart.root_partition.map.cdb

........\..............\...................\uart.root_partition.map.dpi

........\..............\...................\uart.root_partition.map.hbdb.cdb

........\..............\...................\uart.root_partition.map.hbdb.hb_info

........\..............\...................\uart.root_partition.map.hbdb.hdb

........\..............\...................\uart.root_partition.map.hbdb.sig

........\..............\...................\uart.root_partition.map.hdb

........\..............\...................\uart.root_partition.map.kpt

........\..............\README

........\simulation\modelsim\uart.sft

........\..........\........\uart.vo

........\..........\........\uart_8_1200mv_0c_slow.vo

........\..........\........\uart_8_1200mv_0c_v_slow.sdo

........\..........\........\uart_8_1200mv_85c_slow.vo

........\..........\........\uart_8_1200mv_85c_v_slow.sdo

........\..........\........\uart_min_1200mv_0c_fast.vo

........\..........\........\uart_min_1200mv_0c_v_fast.sdo

........\..........\........\uart_modelsim.xrf

........\..........\........\uart_v.sdo

........\uart.asm.rpt

........\uart.done

........\uart.eda.rpt

........\uart.fit.rpt

........\uart.fit.smsg

........\uart.fit.summary

........\uart.flow.rpt

........\uart.map.rpt

........\uart.map.summary

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