文件名称:fifo
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本文档是一个异步FIFO设计的完整工程，利用modelsim仿真软件，分不同的模块-This document is the complete works of an asynchronous FIFO design, the use of the modelsim simulation software, divided into different modules
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下载文件列表
asyn_fifo\grey_to_norm.vhd
.........\norm_to_grey.vhd
.........\dffx.vhd
.........\__projnav\coregen.rsp
.........\.........\asyn_fifo.gfl
.........\.........\hb_cmds
.........\.........\runXst_tcl.rsp
.........\.........\ednTOngd_tcl.rsp
.........\.........\asyn_fifo_flowplus.gfl
.........\.........\asyn_fifo.xst
.........\.........\xtb.rsp
.........\.........\label
.........\__projnav
.........\asyn_fifo.npl
.........\coregen.log
.........\coregen.prj
.........\ram.vhd
.........\wr_addr.vhd
.........\rd_addr.vhd
.........\asyn_fifo.vhd
.........\__projnav.log
.........\automake.log
.........\asyn_fifo.ldo
.........\transcript
.........\work\_info
.........\....\asyn_fifo\_primary.dat
.........\....\.........\behavioral.dat
.........\....\.........\behavioral.asm
.........\....\asyn_fifo
.........\....\dffx\_primary.dat
.........\....\....\behav.dat
.........\....\....\behav.asm
.........\....\dffx
.........\....\grey_to_norm\_primary.dat
.........\....\............\rtl.dat
.........\....\............\rtl.asm
.........\....\grey_to_norm
.........\....\norm_to_grey\_primary.dat
.........\....\............\rtl.dat
.........\....\............\rtl.asm
.........\....\norm_to_grey
.........\....\ram\_primary.dat
.........\....\...\behavioral.dat
.........\....\...\behavioral.asm
.........\....\ram
.........\....\.d_addr\_primary.dat
.........\....\.......\behavioral.dat
.........\....\.......\behavioral.asm
.........\....\rd_addr
.........\....\wr_addr\_primary.dat
.........\....\.......\behavioral.dat
.........\....\.......\behavioral.asm
.........\....\wr_addr
.........\....\testwave\_primary.dat
.........\....\........\testbench_arch.dat
.........\....\........\testbench_arch.asm
.........\....\testwave
.........\....\asyn_fifo_cfg\_primary.dat
.........\....\.............\_vhdl.asm
.........\....\asyn_fifo_cfg
.........\work
.........\asyn_fifo.vhd.bak
.........\ram.vhd.bak
.........\rd_addr.vhd.bak
.........\wr_addr.vhd.bak
.........\asyn_fifo.mpf
.........\asyn_fifo.cr.mti
.........\vsim.wlf
.........\pepExtractor.prj
.........\xst\work\sub00\vhpl00.vho
.........\...\....\.....\vhpl01.vho
.........\...\....\.....\vhpl02.vho
.........\...\....\.....\vhpl03.vho
.........\...\....\.....\vhpl04.vho
.........\...\....\.....\vhpl05.vho
.........\...\....\.....\vhpl06.vho
.........\...\....\.....\vhpl07.vho
.........\...\....\.....\vhpl08.vho
.........\...\....\.....\vhpl09.vho
.........\...\....\.....\vhpl10.vho
.........\...\....\.....\vhpl11.vho
.........\...\....\.....\vhpl12.vho
.........\...\....\.....\vhpl13.vho
.........\...\....\sub00
.........\...\....\hdllib.ref
.........\...\....\hdpdeps.ref
.........\...\work
.........\xst
.........\testwave.tbw
.........\testwave.vhw
.........\testwave.ANT
.........\testwave.ado
.........\testwave.udo
.........\testwave.fdo
.........\results.txt
.........\asyn_fifo.prj
.........\asyn_fifo.cmd_log
.........\asyn_fifo.syr
.........\asyn_fifo.stx
.........\_ngo\netlist.lst