文件名称:new_RS_Verilog
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这是基于FPGA的RS编解码的实际例子。我已经调试完成！- This is arranges the decoding based on FPGA RS the actual example. I already debugged complete!
(系统自动生成,下载前可以参看下载内容)
下载文件列表
new_RS_Verilog\rs-codec-5-6.tgz
..............\rs-codec-8-2.tgz
..............\...........4\berlekamp.v
..............\............\chien-search.v
..............\............\codec
..............\............\data-rom.v
..............\............\decode.v
..............\............\encode.v
..............\............\inverse.v
..............\............\LGPL
..............\............\run
..............\............\syndrome.v
..............\............\test-bench.v
..............\rs-codec-8-4.tgz
..............\rs-codec-9-4.tgz
..............\rs-codec-8-4
new_RS_Verilog
..............\rs-codec-8-2.tgz
..............\...........4\berlekamp.v
..............\............\chien-search.v
..............\............\codec
..............\............\data-rom.v
..............\............\decode.v
..............\............\encode.v
..............\............\inverse.v
..............\............\LGPL
..............\............\run
..............\............\syndrome.v
..............\............\test-bench.v
..............\rs-codec-8-4.tgz
..............\rs-codec-9-4.tgz
..............\rs-codec-8-4
new_RS_Verilog