文件名称:adder4_head

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 246kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 张*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

4位二进制并行加法器。现在普遍使用的并行加法器是超前进位加法器,在几个全加器的基础上增加了一个超前进位形成逻辑,以减少由于逐步进位信号的传递所造成的时延。-Four binary parallel adder. Now commonly used parallel adder is advanced in several adder, carries on the basis of QuanJia device adds an advanced form logic, to reduce carryover carryover signal transmission because gradually caused by delay.


(系统自动生成,下载前可以参看下载内容)

下载文件列表

adder4_head\adder4_head.asm.rpt

...........\adder4_head.done

...........\adder4_head.fit.rpt

...........\adder4_head.fit.smsg

...........\adder4_head.fit.summary

...........\adder4_head.flow.rpt

...........\adder4_head.map.rpt

...........\adder4_head.map.summary

...........\adder4_head.pin

...........\adder4_head.pof

...........\adder4_head.qpf

...........\adder4_head.qsf

...........\adder4_head.qws

...........\adder4_head.sim.rpt

...........\adder4_head.sof

...........\adder4_head.tan.rpt

...........\adder4_head.tan.summary

...........\adder4_head.v

...........\adder4_head.v.bak

...........\adder4_head.vwf

...........\db\adder4_head.asm.qmsg

...........\..\adder4_head.asm_labs.ddb

...........\..\adder4_head.cbx.xml

...........\..\adder4_head.cmp.bpm

...........\..\adder4_head.cmp.cdb

...........\..\adder4_head.cmp.ecobp

...........\..\adder4_head.cmp.hdb

...........\..\adder4_head.cmp.logdb

...........\..\adder4_head.cmp.rdb

...........\..\adder4_head.cmp.tdb

...........\..\adder4_head.cmp0.ddb

...........\..\adder4_head.db_info

...........\..\adder4_head.eco.cdb

...........\..\adder4_head.eds_overflow

...........\..\adder4_head.fit.qmsg

...........\..\adder4_head.fnsim.cdb

...........\..\adder4_head.fnsim.hdb

...........\..\adder4_head.fnsim.qmsg

...........\..\adder4_head.hier_info

...........\..\adder4_head.hif

...........\..\adder4_head.map.bpm

...........\..\adder4_head.map.cdb

...........\..\adder4_head.map.ecobp

...........\..\adder4_head.map.hdb

...........\..\adder4_head.map.logdb

...........\..\adder4_head.map.qmsg

...........\..\adder4_head.map_bb.cdb

...........\..\adder4_head.map_bb.hdb

...........\..\adder4_head.map_bb.hdbx

...........\..\adder4_head.map_bb.logdb

...........\..\adder4_head.pre_map.cdb

...........\..\adder4_head.pre_map.hdb

...........\..\adder4_head.psp

...........\..\adder4_head.root_partition.cmp.atm

...........\..\adder4_head.root_partition.cmp.dfp

...........\..\adder4_head.root_partition.cmp.hdbx

...........\..\adder4_head.root_partition.cmp.logdb

...........\..\adder4_head.root_partition.cmp.rcf

...........\..\adder4_head.root_partition.map.atm

...........\..\adder4_head.root_partition.map.hdbx

...........\..\adder4_head.root_partition.map.info

...........\..\adder4_head.rpp.qmsg

...........\..\adder4_head.rtlv.hdb

...........\..\adder4_head.rtlv_sg.cdb

...........\..\adder4_head.rtlv_sg_swap.cdb

...........\..\adder4_head.sgate.rvd

...........\..\adder4_head.sgate_sm.rvd

...........\..\adder4_head.sgdiff.cdb

...........\..\adder4_head.sgdiff.hdb

...........\..\adder4_head.signalprobe.cdb

...........\..\adder4_head.sim.cvwf

...........\..\adder4_head.sim.hdb

...........\..\adder4_head.sim.qmsg

...........\..\adder4_head.sim.rdb

...........\..\adder4_head.simfam

...........\..\adder4_head.sld_design_entry.sci

...........\..\adder4_head.sld_design_entry_dsc.sci

...........\..\adder4_head.syn_hier_info

...........\..\adder4_head.tan.qmsg

...........\..\adder4_head.tis_db_list.ddb

...........\..\adder4_head.tmw_info

...........\..\prev_cmp_adder4_head.asm.qmsg

...........\..\prev_cmp_adder4_head.fit.qmsg

...........\..\prev_cmp_adder4_head.map.qmsg

...........\..\prev_cmp_adder4_head.qmsg

...........\..\prev_cmp_adder4_head.sim.qmsg

...........\..\prev_cmp_adder4_head.tan.qmsg

...........\..\wed.wsf

...........\db

adder4_head

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