文件名称:Ch8_11
介绍说明－－下载内容均来自于网络，请自行研究使用
this is a verilog program for a moore machine
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Ch8_11\Ch8_11.bld
......\Ch8_11.cmd_log
......\Ch8_11.gise
......\Ch8_11.ise
......\Ch8_11.lso
......\Ch8_11.ngc
......\Ch8_11.ngr
......\Ch8_11.prj
......\Ch8_11.stx
......\Ch8_11.syr
......\Ch8_11.v
......\Ch8_11.xise
......\Ch8_11.xst
......\Ch8_11_envsettings.html
......\Ch8_11_summary.html
......\.......xdb\cst.xbcd
......\..........\tmp\ise\version
......\..........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
......\..........\...\...\............\..................\.........\HDProject_StrTbl
......\..........\...\...\............\..................\__stored_object_table__
......\..........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
......\..........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
......\..........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
......\..........\...\...\............\................\................\dpm_project_main_StrTbl
......\..........\...\...\............\................Gui\CViewSelector
......\..........\...\...\............\...................\CViewSelector_StrTbl
......\..........\...\...\............\...................\File-SynthesisOnly
......\..........\...\...\............\...................\File-SynthesisOnly_StrTbl
......\..........\...\...\............\...................\Library-SynthesisOnly
......\..........\...\...\............\...................\Library-SynthesisOnly_StrTbl
......\..........\...\...\............\...................\Process-BehavioralSim-
......\..........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG
......\..........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG_StrTbl
......\..........\...\...\............\...................\Process-BehavioralSim-_StrTbl
......\..........\...\...\............\...................\Process-SynthesisOnly-
......\..........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
......\..........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
......\..........\...\...\............\...................\Process-SynthesisOnly-_StrTbl
......\..........\...\...\............\...................\Source-BehavioralSim-AutoCompile
......\..........\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl
......\..........\...\...\............\...................\Source-SynthesisOnly-AutoCompile
......\..........\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
......\..........\...\...\............\xreport\Gc_RvReportViewer-Current-Module
......\..........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-Ch8_11
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-Ch8_11_StrTbl
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-topmod
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-topmod_StrTbl
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
......\..........\...\...\..REGISTRY__\Autonym\regkeys
......\..........\...\...\............\bitgen\regkeys
......\..........\...\...\............\...init\regkeys
......\..........\...\...\............\common\regkeys
......\..........\...\...\............\.pldfit\regkeys
......\..........\...\...\............\dumpngdio\regkeys
......\..........\...\...\............\fuse\regkeys
......\..........\...\...\............\HierarchicalDesign\HDProject\regkeys
......\..........\...\...\............\hprep6\regkeys
......\..........\...\...\............\idem\regkeys
......\..........\...\...\............\libgen\regkeys
......\..........\...\...\............\map\regkeys
......\..........\...\...\............\netgen\regkeys
......\..........\...\...\............\.gc2edif\regkeys
......\..........\...\...\............\...build\regkeys
......\.........
......\Ch8_11.cmd_log
......\Ch8_11.gise
......\Ch8_11.ise
......\Ch8_11.lso
......\Ch8_11.ngc
......\Ch8_11.ngr
......\Ch8_11.prj
......\Ch8_11.stx
......\Ch8_11.syr
......\Ch8_11.v
......\Ch8_11.xise
......\Ch8_11.xst
......\Ch8_11_envsettings.html
......\Ch8_11_summary.html
......\.......xdb\cst.xbcd
......\..........\tmp\ise\version
......\..........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
......\..........\...\...\............\..................\.........\HDProject_StrTbl
......\..........\...\...\............\..................\__stored_object_table__
......\..........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
......\..........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
......\..........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
......\..........\...\...\............\................\................\dpm_project_main_StrTbl
......\..........\...\...\............\................Gui\CViewSelector
......\..........\...\...\............\...................\CViewSelector_StrTbl
......\..........\...\...\............\...................\File-SynthesisOnly
......\..........\...\...\............\...................\File-SynthesisOnly_StrTbl
......\..........\...\...\............\...................\Library-SynthesisOnly
......\..........\...\...\............\...................\Library-SynthesisOnly_StrTbl
......\..........\...\...\............\...................\Process-BehavioralSim-
......\..........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG
......\..........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG_StrTbl
......\..........\...\...\............\...................\Process-BehavioralSim-_StrTbl
......\..........\...\...\............\...................\Process-SynthesisOnly-
......\..........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
......\..........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
......\..........\...\...\............\...................\Process-SynthesisOnly-_StrTbl
......\..........\...\...\............\...................\Source-BehavioralSim-AutoCompile
......\..........\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl
......\..........\...\...\............\...................\Source-SynthesisOnly-AutoCompile
......\..........\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
......\..........\...\...\............\xreport\Gc_RvReportViewer-Current-Module
......\..........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-Ch8_11
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-Ch8_11_StrTbl
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-topmod
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-topmod_StrTbl
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
......\..........\...\...\..REGISTRY__\Autonym\regkeys
......\..........\...\...\............\bitgen\regkeys
......\..........\...\...\............\...init\regkeys
......\..........\...\...\............\common\regkeys
......\..........\...\...\............\.pldfit\regkeys
......\..........\...\...\............\dumpngdio\regkeys
......\..........\...\...\............\fuse\regkeys
......\..........\...\...\............\HierarchicalDesign\HDProject\regkeys
......\..........\...\...\............\hprep6\regkeys
......\..........\...\...\............\idem\regkeys
......\..........\...\...\............\libgen\regkeys
......\..........\...\...\............\map\regkeys
......\..........\...\...\............\netgen\regkeys
......\..........\...\...\............\.gc2edif\regkeys
......\..........\...\...\............\...build\regkeys
......\.........