文件名称:de2_dac_lcd
- 所属分类：
- VHDL编程
- 资源属性：
- 上传时间：
- 2012-11-26
- 文件大小：
- 558kb
- 下载次数：
- 0次
- 提 供 者：
- juan *****
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
FPGA KIT DE2-35
This project outputs a selected voltaje using VGA DAC, the DAC module is controlled using LCD display and buttons.
This project outputs a selected voltaje using VGA DAC, the DAC module is controlled using LCD display and buttons.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
de2_dac_lcd
...........\db
...........\..\DE2_DAC.db_info
...........\..\DE2_DAC.eco.cdb
...........\..\DE2_DAC.sld_design_entry.sci
...........\..\prev_cmp_DE2_DAC.asm.qmsg
...........\..\prev_cmp_DE2_DAC.eda.qmsg
...........\..\prev_cmp_DE2_DAC.fit.qmsg
...........\..\prev_cmp_DE2_DAC.map.qmsg
...........\..\prev_cmp_DE2_DAC.qmsg
...........\..\prev_cmp_DE2_DAC.tan.qmsg
...........\DE2_DAC.asm.rpt
...........\DE2_DAC.done
...........\DE2_DAC.dpf
...........\DE2_DAC.eda.rpt
...........\DE2_DAC.fit.rpt
...........\DE2_DAC.fit.summary
...........\DE2_DAC.flow.rpt
...........\DE2_DAC.map.rpt
...........\DE2_DAC.map.summary
...........\DE2_DAC.pin
...........\DE2_DAC.pof
...........\DE2_DAC.qpf
...........\DE2_DAC.qsf
...........\DE2_DAC.qws
...........\DE2_DAC.sof
...........\DE2_DAC.tan.rpt
...........\DE2_DAC.tan.summary
...........\DE2_DAC.vhd
...........\DE2_DAC.vhd.bak
...........\DE2_DAC_nativelink_simulation.rpt
...........\flash.cmp
...........\flash.map
...........\flash.pof
...........\flash.qip
...........\flash.vhd
...........\incremental_db
...........\..............\compiled_partitions
...........\..............\...................\DE2_DAC.root_partition.cmp.atm
...........\..............\...................\DE2_DAC.root_partition.cmp.dfp
...........\..............\...................\DE2_DAC.root_partition.cmp.hdbx
...........\..............\...................\DE2_DAC.root_partition.cmp.kpt
...........\..............\...................\DE2_DAC.root_partition.cmp.logdb
...........\..............\...................\DE2_DAC.root_partition.cmp.rcf
...........\..............\...................\DE2_DAC.root_partition.map.atm
...........\..............\...................\DE2_DAC.root_partition.map.dpi
...........\..............\...................\DE2_DAC.root_partition.map.hdbx
...........\..............\...................\DE2_DAC.root_partition.map.kpt
...........\..............\README
...........\simulation
...........\..........\modelsim
...........\..........\........\dac_lib
...........\..........\........\.......\_info
...........\..........\........\DE2_DAC.sft
...........\..........\........\DE2_DAC.vho
...........\..........\........\DE2_DAC_modelsim.xrf
...........\..........\........\DE2_DAC_run_msim_gate_vhdl.do
...........\..........\........\DE2_DAC_run_msim_rtl_vhdl.do
...........\..........\........\DE2_DAC_vhd.sdo
...........\..........\........\gate_work
...........\..........\........\.........\de2_dac
...........\..........\........\.........\.......\structure.dat
...........\..........\........\.........\.......\structure.dbs
...........\..........\........\.........\.......\structure.psm
...........\..........\........\.........\.......\_primary.dat
...........\..........\........\.........\.......\_primary.dbs
...........\..........\........\.........\_info
...........\..........\........\.........\_temp
...........\..........\........\modelsim.ini
...........\..........\........\msim_transcript
...........\..........\........\rtl_work
...........\..........\........\........\de2_dac
...........\..........\........\........\.......\dac_arch.dat
...........\..........\........\........\.......\dac_arch.dbs
...........\..........\........\........\.......\dac_arch.psm
...........\..........\........\........\.......\_primary.dat
...........\..........\........\........\.......\_primary.dbs
...........\..........\........\........\_info
...........\..........\........\........\_temp
...........\db
...........\..\DE2_DAC.db_info
...........\..\DE2_DAC.eco.cdb
...........\..\DE2_DAC.sld_design_entry.sci
...........\..\prev_cmp_DE2_DAC.asm.qmsg
...........\..\prev_cmp_DE2_DAC.eda.qmsg
...........\..\prev_cmp_DE2_DAC.fit.qmsg
...........\..\prev_cmp_DE2_DAC.map.qmsg
...........\..\prev_cmp_DE2_DAC.qmsg
...........\..\prev_cmp_DE2_DAC.tan.qmsg
...........\DE2_DAC.asm.rpt
...........\DE2_DAC.done
...........\DE2_DAC.dpf
...........\DE2_DAC.eda.rpt
...........\DE2_DAC.fit.rpt
...........\DE2_DAC.fit.summary
...........\DE2_DAC.flow.rpt
...........\DE2_DAC.map.rpt
...........\DE2_DAC.map.summary
...........\DE2_DAC.pin
...........\DE2_DAC.pof
...........\DE2_DAC.qpf
...........\DE2_DAC.qsf
...........\DE2_DAC.qws
...........\DE2_DAC.sof
...........\DE2_DAC.tan.rpt
...........\DE2_DAC.tan.summary
...........\DE2_DAC.vhd
...........\DE2_DAC.vhd.bak
...........\DE2_DAC_nativelink_simulation.rpt
...........\flash.cmp
...........\flash.map
...........\flash.pof
...........\flash.qip
...........\flash.vhd
...........\incremental_db
...........\..............\compiled_partitions
...........\..............\...................\DE2_DAC.root_partition.cmp.atm
...........\..............\...................\DE2_DAC.root_partition.cmp.dfp
...........\..............\...................\DE2_DAC.root_partition.cmp.hdbx
...........\..............\...................\DE2_DAC.root_partition.cmp.kpt
...........\..............\...................\DE2_DAC.root_partition.cmp.logdb
...........\..............\...................\DE2_DAC.root_partition.cmp.rcf
...........\..............\...................\DE2_DAC.root_partition.map.atm
...........\..............\...................\DE2_DAC.root_partition.map.dpi
...........\..............\...................\DE2_DAC.root_partition.map.hdbx
...........\..............\...................\DE2_DAC.root_partition.map.kpt
...........\..............\README
...........\simulation
...........\..........\modelsim
...........\..........\........\dac_lib
...........\..........\........\.......\_info
...........\..........\........\DE2_DAC.sft
...........\..........\........\DE2_DAC.vho
...........\..........\........\DE2_DAC_modelsim.xrf
...........\..........\........\DE2_DAC_run_msim_gate_vhdl.do
...........\..........\........\DE2_DAC_run_msim_rtl_vhdl.do
...........\..........\........\DE2_DAC_vhd.sdo
...........\..........\........\gate_work
...........\..........\........\.........\de2_dac
...........\..........\........\.........\.......\structure.dat
...........\..........\........\.........\.......\structure.dbs
...........\..........\........\.........\.......\structure.psm
...........\..........\........\.........\.......\_primary.dat
...........\..........\........\.........\.......\_primary.dbs
...........\..........\........\.........\_info
...........\..........\........\.........\_temp
...........\..........\........\modelsim.ini
...........\..........\........\msim_transcript
...........\..........\........\rtl_work
...........\..........\........\........\de2_dac
...........\..........\........\........\.......\dac_arch.dat
...........\..........\........\........\.......\dac_arch.dbs
...........\..........\........\........\.......\dac_arch.psm
...........\..........\........\........\.......\_primary.dat
...........\..........\........\........\.......\_primary.dbs
...........\..........\........\........\_info
...........\..........\........\........\_temp