文件名称:FIFO_counters_VHDL
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FIFO和计数器以及时钟控制，用于程控交换机教学，与DSP和ADDA芯片配合完成程控交换机功能-FIFO and counters and clock control, program-controlled switchboard for teaching, with the DSP and complete ADDA chip with program-controlled switchboard function
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下载文件列表
FIFO&counters_VHDL
..................\9536.vhd
..................\add8_nc.vhd
..................\add_sub_12.vhd
..................\ad_ctl_tb.vhd
..................\afifo127s8_ip.vhd
..................\clk_gen_block.vhdl
..................\clock_div.vhd
..................\communication.vhd
..................\com_max.vhd
..................\com_max_out_user.vhd
..................\com_min.vhd
..................\counter.vhd
..................\9536.vhd
..................\add8_nc.vhd
..................\add_sub_12.vhd
..................\ad_ctl_tb.vhd
..................\afifo127s8_ip.vhd
..................\clk_gen_block.vhdl
..................\clock_div.vhd
..................\communication.vhd
..................\com_max.vhd
..................\com_max_out_user.vhd
..................\com_min.vhd
..................\counter.vhd