文件名称:hdl
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在EDK的环境下的嵌入式源代码,EDK初级使用实例!方便初学者的使用!-EDK environment in the embedded source code, EDK primary use case! To facilitate the use of beginners!
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下载文件列表
hdl
...\clock_generator_0_wrapper.vhd
...\debug_module_wrapper.vhd
...\dlmb_cntlr_wrapper.vhd
...\dlmb_wrapper.vhd
...\elaborate
...\.........\lmb_bram_elaborate_v1_00_a
...\.........\..........................\hdl
...\.........\..........................\...\verilog
...\.........\..........................\...\.......\lmb_bram_elaborate.v
...\.........\xps_bram_if_cntlr_1_bram_elaborate_v1_00_a
...\.........\..........................................\hdl
...\.........\..........................................\...\verilog
...\.........\..........................................\...\.......\xps_bram_if_cntlr_1_bram_elaborate.v
...\ilmb_cntlr_wrapper.vhd
...\ilmb_wrapper.vhd
...\leds_wrapper.vhd
...\lmb_bram_wrapper.v
...\mb_plb_wrapper.vhd
...\microblaze_0_wrapper.vhd
...\proc_sys_reset_0_wrapper.vhd
...\rs232_wrapper.vhd
...\system.v
...\system_stub.v
...\xps_bram_if_cntlr_1_bram_wrapper.v
...\xps_bram_if_cntlr_1_wrapper.vhd
...\clock_generator_0_wrapper.vhd
...\debug_module_wrapper.vhd
...\dlmb_cntlr_wrapper.vhd
...\dlmb_wrapper.vhd
...\elaborate
...\.........\lmb_bram_elaborate_v1_00_a
...\.........\..........................\hdl
...\.........\..........................\...\verilog
...\.........\..........................\...\.......\lmb_bram_elaborate.v
...\.........\xps_bram_if_cntlr_1_bram_elaborate_v1_00_a
...\.........\..........................................\hdl
...\.........\..........................................\...\verilog
...\.........\..........................................\...\.......\xps_bram_if_cntlr_1_bram_elaborate.v
...\ilmb_cntlr_wrapper.vhd
...\ilmb_wrapper.vhd
...\leds_wrapper.vhd
...\lmb_bram_wrapper.v
...\mb_plb_wrapper.vhd
...\microblaze_0_wrapper.vhd
...\proc_sys_reset_0_wrapper.vhd
...\rs232_wrapper.vhd
...\system.v
...\system_stub.v
...\xps_bram_if_cntlr_1_bram_wrapper.v
...\xps_bram_if_cntlr_1_wrapper.vhd